Dual agp slots?

[Floppyman]

I've always been thinking of this...but would it be possible to have dual agp slots on a board and run 2 videocards, say geforces for instance as one...gettin double performance, I supppose with all the hype of agp 4x, wouldn't it be better to split the speed, having two slots each running agp 2x? I suppose you'd need a good cpu to power this, but hey dual cpu's say PIII, would bring enough power to games that support dual processing....what do ya think? Is it possible...you'd probably have to have fast bus that supports plenty of bandwith between the cpu-chipset-memory-slots but with 266+ bus speedds in Amd's future plans would this be possible? Any input is appreciated.

[HAL9000]

Anything is possible, but is there a demand for it? If not, it will probably never be, but if the demand is strong enough, somebody will make it.

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If it ain't broke, you're not pushing hard enough!

[Danny G]

I can think of only one particulaer demand for it - in the future with virtual 3d gaming (ie youre really in there) possibly. May take the load of one graphics card I spose.

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Never trust a man who when left alone in a room with a tea cosy doesn't try it on.

[Toaster]

Hey folks,
Dual AGP slot boards have been made but it was a deviation of AGP.
Like AGP, the slots have access to system memory for SCSI controllers and the like.
The problem with dual "AGP" slots is bus loading and O/S support. I think it was super micro and ALR that made a "beta" dual AGP board. They had IRQ errors and multiple devices contending for bus time.
Having more then one device accessing the memory bus at the same time is a disaster.
I also saw at a design/R&D for ALR a dual in line PCI bus arraingment. It allowed "on slot" memory accessing for caching hard disk adaptors and the like. Now, its highly propriatory and of limited use.
New bus designs are "just around the corner" and should be apearing within the next 12-18 months. Also will be the "rouge IRQ" system board which utilizes claimed but unused IRQ time for devices. This is in beta as well.

[Floppyman]

Hey Toaster,

If there was a problem with multiple devices accessing the memory bus,wouldn't the use of rdram solve the problem?

[Toaster]

I think the problem boiled down to "swamping" of the memory bus. Look at it like this:
2 devices and one O/S fighting for memory space and the CPU doing all the work.
In my eyes, the best way to overcome these problems is a re-designed memory bus.
I saw a "beta" board by ALR that used 2 DIMMS for high and low addressing. To the system board, 8ns memory was used as though it were 4ns memory. This is a variatin of memory interleaving used on 386/486 system boards. The down side is that system memory is 1/2 of installed memory. The high side is that memory bus speeds are doubled and thus the access rate. Effective CAS/RAS timings are 1-1.5...thats speedy!