belive it or not

[bailey]

would you belive that I have a celeron 566 fc-pga running at 850mhz with the stock heatsink and fan and the cpu temp is holding at 91 deg F with seti running full time 24/7,
the core voltage is at 1.65, been running this way for over a month and still going strong.

aopen ax6bc
maxtor 20g 7200
abit slocket 3
128 pc133
large mid-tower 300w
no additional case fans or ventalation, just the one on ps
w98
never a bsod,lock-up,or crash, running perfectly.

[Toaster]

Thats easy to believe because i`m using a stck fan/heatsink as well on another system. One of my systems has a Cel-mine 600 running at 933 with stock fan/heatsink and voltages (1.50volts). A stable overclocker. I had to increase voltage to go beyond a GIG and at 1.65 at 1080mhz. Cool and fast.

[reboot]

My 600 got to 750 (83mhz bus) with stock volt/fan/hs, but had to go to 1.65 to get the "magical" 900.

[Toaster]

Next time you folks get a chance to see a PIII-E and a Cel-mine at the same time, look closely at the top and underside of the chips. Me and a friend have "converted" a Cel-mine to a PIII-E. I honestly think Intel decides what the chip is AFTER MANUFACTURE. For reasons I`m still investigating I really believe this. The now PIII-E was a Cel-mine 600 that now runs at 966 with 256kb cache thats fully enabled. Next comes overclocking this lil fella.
Done to the CPU was "rearrainging" the caps and adding 2 caps. The soldering was tricky but the chip seems stable to date under Win95/8 and Linux. Next up after overclocking is SMP.....I may be asking too much for 85 bucks...huh?

[Xayd]

lol Toaster. I thought I was asking too much by wanting a gig from my 60 dollar Duron. I never demanded a TBird for 60 bucks, but it would be nice...

Xayd

[Curt]

Toaster, I trust that you'll keep us informed about your amazing discovery. I may never attempt the modification but the prospect is very intriguing. A PIII for under $100, such a deal.

[bailey]

I have tried to tell you guys this fact many times. they are one chip, all come off the same piece of silicon, only after testing is the decision made as to what to call it, a p3 or a celeron fc-pga, all are coppermines and everything is the same when they are started to be constructed, slight differences in the process is picked out in the testing stage and the decision as to what rateing to print on the cover is made. one die-many chips. I was not aware of the change of the capicators and location, but maybe that is all that they had to do to the p3 to disable half the cache to call it a celeron, the defect that failed the test may or may not be noticeable by us.it sure would be neat to be able to put the celerons back to the p3 at 100mhz clock.
I would even buy another one just to try it.

[Toaster]

The more I dig, the more I believe that the PIII-E and the Cel-mine are the same chip. To date, the caps decide voltage and bus rate by bypassing internal bus rate choices.
This was a tricky endevor and more reserch is needed.
Now it seems, Intel thinks their dirty lil secret is safe and sound because on very recent Cel-mines they even omitted the covering over the pads for the caps. Still, well worth the 85 bucks and yet so much more to learn. I would suggest that Bailey is more correct than not. It makes no "business" sence to "build" differing lines of the same product when the end product can be "decided" after their testing.
Like the first gen Celerys, soon the Cel-mine will out sell the PIII by yet a larger margin and their standard will be relaxed and more and more "PIIIs" will come out as Cel-mines. More as data comes to bare.

[UncaDanno]

Bailey's right. Back in the olden days when P100s were hot stuff, I read an article that outlined Intel's process:

The chips are all made with the same die. (Each "generation" of the chip has its own die).
A certain percentage (back then it was ~75%) would test out at the top speed for that generation of the chip. These were labeled with that speed and adorned with the hotrod heat sink.
The chips that failed to pass the speed test were passed to the next test. Also, once the quota for the highest speed was met, ALL the chips would pass to the next test.
A higher percentage of the chips (~95%) would test out at the next-highest speed. This includes the ones that were passed on to this level because the high-end quota had been met. The ones that would pass were labeled with this speed and given the next-to-hotrod heat sink.
They had determined that all chips could pass the speed test for the slow end of the current "generation" of chips.
So this means that the meager few that failed the mid-range speed test and ALL OTHER chips that were passed on after both the top- and mid-range quotas were met would be labeled as the low-end chips.

A lot of folks would buy a P75 chip, change the dip switches in the mobo, and, viola!, they had a P100. That ran "kinda hot".

[Toaster]

I remember those days well. One would buy a P75 with a system board that supported a 66mhz FSB and then run up the bus rate to give a P-100 before they were even released.
The sad thing was that the P-75 was slower then the 486/100 because of the very slow bus rate.

[bailey]

now I remember where I got the information, way back when, the ham radio club I belonged rented a film put out by intell that showed how the chips were made starting from the drafting table to the photo etching of the die process, if I remember correctly, the number of chips on a single wafer was in the hundreds, but that might have lsi chips, realy don't matter to me how many cpus will fit on a wafer, but it's a lot, anyway, the whole process was very interesting the way it's done, really quite simple, the hard part that is most of the work is in the designeing and engeering part, years of work was invloved at first.
only because of the volume of cpu made in the process, is why they are so cheep today, yes in my humble opinion, they are cheap.

[kraken]

Following the logic are Durons really Tbird in disguise.

[bailey]

if they came from the same die, and off the same silicon waffer, then yes it is very likely true.

[kraken]

BULL****!!!

How many processors can you fit into a square cm.

I dunno quantum may tell us..

Cache memory requires space.

Less space = more processors.

Silicon wafers = expense.

Market place tells us that production = public acceptance / the number of units.

Market share = Price

Cache memory requires space

Silicon wafers require purity.

GOT ME!!!!

[bailey]

it's been a long time sence I seen one but I belive the waffers they start out with a about 5-6" in dia, that represents a lot of sq, cm's, and a lot of cpu's on one waffer. one die will print (make) one waffer full of cpu's, after the process is complete , then the cpu's are cut out of the waffer, leads put on then tested and labeled, it is a photo etching film deposit process that takes many stages to complete, the waffers are fed into it on conveyor belt, and the finshed produts exist the same way, so you go fiqure how many cpu's per hour that comes to.

[kraken]

Figure it this way. The CPUs are not the thing but the cache is. Full speed cache has many more transistors than the CPU. Pure silicon is an expensive beast and the use of it must be justified. To merely say that L2 cache is turned off is a production overhead that can be determined in dollars and cents. Pure marketing forces cannot justify the turning off of cache. Who in marketing would not jump at the chance to say we got more memory. The addition of level2 cache to a processor is a big dollar excercise. If someone changes a few capacitors and resistors around and says that they have got XXX cache does not mean it is actually so. If x=2 and Y=1 then cache =256 hell that could be just false reporting. The only way to tell if the scenario is correct is to physically take the processor apart and look at it through a microscope. **** Ive got a 6x86 cyrix that is reported as a 486. To correctly ID the processor through windows requires an update. (which hasn't worked and this is an old processor.) My crack about the duron was just that. The Celerons have long been separate from the pentiums. It will just be a matter of time before the pentiums displace the celerons. They are, by the way, virtually identical with the exception of SSE and cache(bus speeds also noted). It may well be that intel are taking a hit with the celerons and are putting pentiums in their place, but I couldn't see them doing so without advertising the increased cache size.

If you can get 100 processors per wafer then that is better than 50.